BP6 APIC errors clarified.

From: Ted Sikora (tsikora@home.com)
Date: Sat Jan 01 2000 - 15:27:48 EST


I am posting this in reference to the ABit BP6 SMP motherboard.
There seems to be much confusion as to the cause of these messages.

As quoted in the SMP-HOWTO:

  14.

"APIC error interrupt on CPU#n, should never happen" messages in logs

     A message like:
__________________________________________________________________
     APIC error interrupt on CPU#0, should never happen.
     ... APIC ESR0: 00000002
     ... APIC ESR1: 00000000
     ___________________________________________________________________

indicates a 'receive checksum error'. This cannot be caused by Linux as
the APIC message checksumming part is completely in hardware. It might
be marginal hardware. As long as you dont see any instability, they are
not a problem - APIC messages are retried until delivered.
  (Ingo Molnar)

ABit is aware of this and *may* try to resolve this in future revisions.
For now all we can do is live with it. Most boards don't see this until
overclocked a few steps. The only way to eliminate them at present is
backing off on the speed until they disappear. If you board is stable
and you recieve them only occasionally...live with it.

Regards,

--
Ted Sikora
Jtl Development Group 
tsikora@powerusersbbs.com
http://powerusersbbs.com

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