Re: PCI MMIO flushing and stuff (was Re: 2.2.15 with eepro100: eth0:

From: Alan Cox (alan@lxorguk.ukuu.org.uk)
Date: Sun May 21 2000 - 08:50:55 EDT

  • Next message: Alan Cox: "Re: 2.2.15 IDE is more than slow, it's broken!"

    > > > What happens when PCI DMA writes to an address which is currently clean
    > > > within a CPU cache?
    > >
    > > It goes dirty
    >
    > Are you sure? It should be invalidated shouldn't it?

    It depends how smart the CPU/Bus is and if the line is clean but exclusive.
    I dont know if x86 supports it but in this case the CPU can steal the
    transaction and write it to cache taking the line dirty but still exclusive

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