RE: Cache coherency... and locking

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On Thu, 27 Jul 2000, Linda Walsh wrote:

> Some followup -- it was setting/testing 1 integer. So it
> seems it can safely be done w/o lock.

Cool.
 
> Talking with an internal engineer here -- NUMA uses MESI
> cache control similarly to the i386 cache coherency model,
> so a write of one CPU to a an area of memory will be seen
> on other processors as soon as they ask for that memory.

That's specific to MIPS. A general Linux NUMA model probably won't assume
coherence.

--
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